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_______________________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. max14566e/MAX14566AE/max14566be usb host charger identification analog switches 19-5293; rev 1; 3/11 general description the max14566e/MAX14566AE/max14566be are sec - ond-generation usb devices that combine hi-speed usb analog switches with a usb host charger (dedicated charger) identification circuit. these devices support both the latest usb battery charging specification revision 1.2 including data contact detection and a set resistor bias for apple-compliant devices as well as legacy usb d+/d- short detection using data line pullup. the max14566e has a pmosfet open-drain control output ( cen ) and the MAX14566AE has an nmosfet open-drain control output (cen) to restart the peripheral connected to the usb host. these devices feature high-performance hi-speed usb switches with low 4pf (typ) on-capacitance and low 4.0 i (typ) on-resistance. in addition, the devices feature a single digital input (cb) to switch between pass-through mode and autodetection charger mode. the usb host charger identification circuit allows a host usb port to support usb chargers with shorted dp/dm detection and to provide support for apple-compliant devices using a resistor bias on usb data lines. when an apple- compliant device is attached to the port in autodetection charger mode, the devices supply the voltage to the dp and dm lines from the internal resistor-divider. if a usb revision 1.2-compliant device is attached, the devices short dp and dm to allow correct charger detection. the max14566be features an additional digital input (cb1) to allow forced charger mode. these devices have enhanced, high electrostatic dis - charge (esd) protection on the dp and dm inputs up to q 15kv human body model (hbm). all the devices are available in an 8-pin (2mm x 2mm) tdfn package, and are specified over the -40 n c to +85 n c extended temperature range. features s hi-speed usb switching s low 4.0pf (typ) on-capacitance s low 4.0 i (typ) on-resistance s ultra-low 0.1 i (typ) on-resistance flatness s +2.8v to +5.5v supply range s ultra-low 3a (typ) supply current s automatic current-limit switch control s automatic usb charger identification circuit s 15kv high esd hbm protection on dp/dm s 2mm x 2mm, 8-pin tdfn package s -40 n c to +85 n c operating temperature range applications laptops netbooks universal charger including ipod m /iphone m chargers ordering information/ selector guide note: all devices are specified over the -40c to +85c oper - ating temperature range. + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. typical operating circuit iphone and ipod are registered trademarks of apple, inc. evaluation kit available max14566e dm tdm d- dp tdp d+ laptop chipset v bus gnd usb transceiver standby cb cen usb a connector overcurrent protector cen li+ battery external power supply 5v switching power supply usb a apple dock connector apple dock ipod or iphone usb a micro b micro-usb connector phone or mp3 player part pin- package cls control top mark max14566e eta+ 8 tdfn-ep* cen adj MAX14566AE eta+ 8 tdfn-ep* cen adk max14566b eeta+ 8 tdfn-ep* bmr
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 2 stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd.) v cc , tdp, tdm, cb, dp, dm, cen /cen, cb1 .... -0.3v to +6.0v continuous current into any terminal ............................. q 30ma continuous power dissipation (t a = +70 n c) tdfn (derate 11.9mw/ n c above +70 n c) .................... 954mw operating temperature range .......................... -40 n c to +85 n c junction temperature ..................................................... +150 n c storage temperature range ............................ -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c electrical characteristics (v cc = 2.8v to 5.5v, t a = t min to t max, unless otherwise noted. typical values are at v cc = 5.0v, t a = +25 n c.) (note 2) absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . package thermal characteristics (note 1) tdfn junction-to-ambient thermal resistance ( q ja ) ........... 84c/w junction-to-case thermal resistance ( q jc ) ................ 37c/w parameter symbol conditions min typ max units power supply (max14566e/MAX14566AE) power-supply range v cc v cb > v ih 2.8 5.5 v v cb = 0v (note 3) 4.75 5.25 v supply current i cc v cb = v cc v cc = 3.3v 2 f a v cc = 5.5v 7 v cb = 0v v cc = 4.75v 110 200 v cc = 5.25v 120 200 supply current increase d i cc 0 p v cb p v il or v ih p v cb p v cc 2 f a power supply (max14566be) power-supply range v cc v cb = v cc and v cb1 = v cc or v cb = v cc and v cb1 = 0v or v cb = 0v and v cb1 = v cc 2.8 5.5 v v cb = 0v and v cb1 = 0v (note 3) 4.75 5.25 v supply current i cc v cb = v cc and v cb1 = v cc or v cb = v cc and v cb1 = 0v v cc = 3.3v 2 m a v cc = 5.5v 7 v cb = 0v and v cb1 = 0v v cc = 4.75v 110 200 v cc = 5.25v 120 200 v cb = 0v and v cb1 = v cc v cc = 5.0v for typ v cc = 5.5v for max 3 7 supply current increase d i cc v cb1 = 0v; 0 v cb v il and v ih v cb v cc (note 4) 1 m a v cb = 0v; 0 v cb1 v il and v ih v cb1 v cc (note 4) 1
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 3 electrical characteristics (continued) (v cc = 2.8v to 5.5v, t a = t min to t max , unless otherwise noted. typical values are at v cc = 5.0v, t a = +25 n c.) (note 2) parameter symbol conditions min typ max units analog switch analog-signal range v dp ,v dm 0 v cc v on-resistance tdp/tdm switch r on v dp = v dm = 0v to v cc , i dp = i dm = 10ma 4.0 6.5 i on-resistance match between channels tdp/tdm switch d r on v cc = 5.0v, v dp = v dm = 400mv, i dp = i dm = 10ma 0.1 i on-resistance flatness tdp/ tdm switch r flat v cc = 5.0v, v dp = v dm = 0 to v cc , i dp = i dm = 10ma 0.1 i on-resistance of dp/dm short r short v cb = 0v, v dp = 1v, i dp = i dm = 10ma 40 70 i off-leakage current i tdpoff, i tdmoff v cc = 3.6v, v dp = v dm = 0.3v to 3.3v, v tdp = v tdm = 3.3v to 0.3v, v cb = 0v -250 +250 na on-leakage current i dpon ,i dmon v cc = 3.6v, v dp = v dm = 3.3v to 0.3v, v cb = v cc -250 +250 na dynamic performance turn-on time t on v tdp or v tdm = 1.5v, r l = 300 i , c l = 35pf, figure 1 20 100 f s turn-off time t off v tdp or v tdm = 1.5v, r l = 300 i , c l = 35pf, figure 1 1 5 f s tdp, tdm switch propagation delay t plh , t phl r l = r s = 50 i 60 ps output skew t sk(o) skew between dp and dm when connected to tdp and tdm, r l = r s = 50 i , figure 2 40 ps tdp, tdm off-capacitance c off f = 1mhz 2.0 pf dp, dm on-capacitance (connected to tdp, tdm) c on f = 240mhz 4.0 5.5 pf -3db bandwidth bw r l = r s = 50 i (note 4) 1000 mhz off-isolation v iso v tdp , v dp = 0dbm, r l = r s = 50 i , f = 250mhz, figure 3 (note 4) -20 db crosstalk v ct v tdp , v dp = 0dbm, r l = r s = 50 i , f = 250mhz, figure 3 (note 4) -25 db internal resistors dp/dm short pulldown r pd 335 500 710 k i rp1/rp2 ratio rt rp 1.485 1.5 1.515 ratio rp1 + rp2 resistance r rp 95 126 176 k i rm1/rm2 ratio rt rm 0.843 0.85 0.865 ratio rm1 + rm2 resistance r rm 70 94 132 k i comparators dm1 comparator threshold v dm1f dm falling 45 46 47 %v cc dm1 comparator hysteresis 1 % dm2 comparator threshold v dm2f dm falling 6.31 7 7.6 %v cc dm2 comparator hysteresis 1 % dp comparator threshold v dpr dp rising 45 46 47 %v cc
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 4 electrical characteristics (continued) (v cc = 2.8v to 5.5v, t a = t min to t max , unless otherwise noted. typical values are at v cc = 5.0v, t a = +25 n c.) (note 2) note 2: all units are 100% production tested at t a = +25 n c. specifications over temperature are guaranteed by design. note 3: the part is operational from +2.8v to +5.5v. however, in order to have the valid apple resistor-divider network, the v cc supply must stay within the range of +4.75v to +5.25v. note 4: guaranteed by design. test circuits/timing diagrams figure 1. switching time t r < 5ns t f < 5ns 50% v il logic input r l d_ gnd cb v in v ih t of f 0v td_ 0.9 x v 0ut 0.9 x v out t on v out switch output logic input in depends on switch configuration; input polarity determined by sense of switch. v cc c l v cc v out max14566e MAX14566AE max14566be c l includes fixture and stray capacitance. v out = v in r l r l + r on parameter symbol conditions min typ max units dp comparator hysteresis 1 % logic input (cb, cb1) cb/cb1 input logic-high v ih 1.4 v cb/cb1 input logic-low v il 0.4 v cb/cb1 input leakage current i in v cc = 5.5v, 0v p v cb p v il or v ih p v cb p v cc -1 +1 f a cen /cen outputs v bus toggle time (max14566e/ MAX14566AE) t vbt cb = logic 0 to logic 1 or logic 1 to logic 0 0.5 1 2 s cen output logic-high voltage cb = logic 0 to logic 1, i source = 2ma (max14566e only) v cc - 0.4 v cen output leakage current v cc = 5.5v, v cen = 0v, cen deasserted (max14566e only) 1 f a cen output logic-low voltage cb = logic 0 to logic 1, i sink = 2ma (MAX14566AE only) 0.4 v cen output leakage current v cc = v cen = 5.5v, cen deasserted (MAX14566AE only) 1 f a esd protection esd protection level (dp and dm only) v esd hbm q 15 kv esd protection level (all other pins) v esd hbm q 2 kv
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 5 test circuits/timing diagrams (continued) figure 2. output signal skew in+ in- cb v cc out+ out- v in+ v in- v out+ v out- tdp tdm dp dm 0v v+ 0v v+ 0v v+ 0v v+ t plhx t phlx t inrise t outrise t outfall rise-time propagation delay = t plhx or t plhy fall-time propagation delay = t phlx or t phly t sk(o) = |t plhx - t plhy | or |t phlx - t phly | t sk(p) = |t plhx - t phlx | or |t plhy - t phly | 50% 50% 50% 50% 90% 10% 10% 90% 10% 10% r l r l 50% 50% 50% 50% t infall 90% 90% t phly t plhy r s r s max14566e MAX14566AE max14566be
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 6 typical operating characteristics (v cc = 5v, t a = +25 n c, unless otherwise noted.) test circuits/timing diagrams (continued) figure 3. off-isolation and crosstalk tdp/tdm on-resistance vs. supply voltage max14566e toc01 v tdp (v) 5.5 5.0 4.0 4.5 1.0 1.5 2.0 2.5 3.0 3.5 0.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 0 6.0 r on ( i ) v cc = 2.8v v cc = 5.5v 3.5 3.0 2.0 2.5 1.0 1.5 0.5 0 4.0 on-resistance vs. v tdp/tdm max14566e toc02 0.5 1.0 1.5 2.0 2.5 t a = -40c t a = +25c t a = +85c 3.0 3.5 4.0 4.5 5.0 v cc = 3.3v 0 v tdp/tdm (v) r on ( i ) dp/dm short on-resistance vs. supply voltage max14566e toc03 v dp (v) r on ( i ) 5.5 5.0 4.0 4.5 1.0 1.5 2.0 2.5 3.0 3.5 0.5 5 10 15 20 25 30 35 40 45 v cc = 2.8v v cc = 5.5v 50 0 0 6.0 measurements are standardized against shorts at ic terminals. off-isolation is measured between td_ and "off" d_ terminal on each switch. crosstalk is measured from one channel to the other channel. v out cb v cc v cc tdp dp* v in off-isolation = 20log v out v in crosstalk = 20log v out v in network analyzer 50 50 50 50 meas ref 0v or v cc *for crosstalk this pin is dm . max14566e MAX14566AE max14566be
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 7 typical operating characteristics (continued) (v cc = 5v, t a = +25 n c, unless otherwise noted.) tdp/dp leakage current vs. temperature max14566e toc04 temperature (c) leakage current (na) 75 60 30 45 -15 0 15 -30 5 10 15 20 25 30 35 40 45 0 -45 90 v cc = 3.6v, v tdp = 3.3v on-leakage off-leakage supply current vs. supply voltage max14566e toc05 v cc (v) i cc (a) 5.2 4.9 4.6 4.3 4.0 3.7 3.4 3.1 1 2 3 4 5 6 0 2.8 5.5 cb = v cc t a = -40 c t a = +25 c t a = +85 c supply current vs. logic level max14566e toc06 logic level (v) i cc (a) 3.0 2.7 0.3 0.6 0.9 1.5 1.8 2.1 1.2 2.4 20 40 60 80 100 120 140 v cc = 5.5v 160 0 0 3.3 turn-on/turn-off time vs. supply voltage max14566e toc07 v cc (v) turn-on/turn-off time (s) 5.5 5.0 4.0 4.5 3.0 3.5 2.5 2 4 6 8 10 12 t on t off 14 16 18 20 22 24 0 2.0 6.0 v cc (v) logic-input threshold (v) 5.2 4.9 4.3 4.6 3.4 3.7 4.0 3.1 logic-input threshold vs. supply voltage max14566e toc08 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 cb_rising cb_falling 1.2 0 2.8 5.5 autodetection mode max14566e toc09 dm 1v/div cb 2v/div dp 1v/div 10s/div v cc = 5.0v, dp/dm high impedance, cb logic 1 to logic 0
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 8 typical operating characteristics (continued) (v cc = 5v, t a = +25 n c, unless otherwise noted.) autodetection mode max14566e toc10 0v 0v 1ms/div v cc = 5.0v, dp/dm high impedance to 0.5v at dm dm 500mv/div dp 500mv/div auto reset max14566e toc11 cb 2v/div 0v 0v 2s/div max14566e cen 2v/div auto reset max14566e toc12 cb 500mv/div 0v 0v 2s/div MAX14566AE cen 2v/div max14566e toc13 time (x 10 n - 9)s differential signal (v) 1.8 1.6 1.2 1.4 0.4 0.6 0.8 1.0 0.2 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0 2.0 hi-speed usb transmit template usb eye diagram
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 9 pin configuration pin description 1 3 4 8 6 5 cb tdp v cc max14566e MAX14566AE 2 7 tdm cen (cen) dp gnd dm tdfn (2mm 2mm) top view ( ) for MAX14566AE only *connect ep to gnd. *ep 1 3 4 8 6 5 cb tdp v cc max14566be 2 7 tdm cb1 dp gnd dm tdfn (2mm 2mm) top view *ep pin name function max14566e MAX14566AE max14566be 1 cen nmosfet open-drain output, current-limit switch (cls) control output. if cb changes from logic 0 to logic 1 or from logic 1 to logic 0, cen is low for 1s (typ). 1 cen active-low pmosfet open-drain output, current-limit switch (cls) control output. if cb changes from logic 0 to logic 1 or logic 1 to logic 0, cen is high for 1s (typ). 1 cb1 switch control bit. see table 2. 2 2 2 dm usb connector d- connection 3 3 3 dp usb connector d+ connection 4 4 4 gnd ground 5 5 5 v cc power supply. connect a 0.1 f f capacitor between v cc and gnd as close as possible to the device. 6 6 6 tdp host usb transceiver d+ connection 7 7 7 tdm host usb transceiver d- connection 8 8 8 cb switch control bit. see table 1. cb = logic 0, charger mode cb = logic 1 (pm), pass-through mode active, dp/dm connected to tdp/tdm ep exposed pad. connect ep to ground. do not use ep as the only ground connection.
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 10 detailed description the max14566e/MAX14566AE/max14566be are hi-speed usb analog switches that support usb hosts to identify the usb port as a charger port when the usb host is in a low-power mode and cannot enumerate usb devices. these devices feature high-performance hi-speed usb switches with low 4pf (typ) on-capacitance and low 4 i (typ) on-resistance. dp and dm can handle signals between 0v and 6v with any supply voltage. resistor-dividers all the devices feature an internal resistor-divider for biasing data lines to provide support for apple-compliant devices. when these devices are not operated with the resistor-divider, they disconnect the resistor-dividers from the supply voltage to minimize supply current requirements. the resistor-dividers are not connected in pass-through mode. switch control the max14566e/MAX14566AE feature a single digital input, cb, for mode selection (table 1). connect cb to a logic-level low voltage for autodetection charger mode (am). see the autodetection section for more informa - tion. connect cb to a logic-level high voltage for normal high-speed pass-through mode (pm). the max14566be features dual digital inputs, cb and cb1, for mode selec - tion (table 2). connect cb to a logic-level high for nor - mal high-speed pass-through mode (pm). connect cb to a logic-level low for different charger-mode selection functional diagram rm1 500ki rm2 dp control logic one shot rp1 rp2 dp tdp tdm cb1* dm cb cen (cen) v bias 0.46v cc v cc v cc gnd v cc dm1 0.46v cc dm2 0.07v cc max14566e MAX14566AE max14566be 1s ( ) for MAX14566AE only *for max14566be only
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 11 with cb1. connect cb1 to a logic-level low for auto mode (am) or connect cb1 to a logic-level high for forced dedicated-charger mode (fm). autodetection all the devices feature autodetection charger mode for dedicated chargers and usb masters. cb must be set low to activate autodetection charger mode. in autodetection charger mode, the max14566e moni - tors the voltages at dm and dp to determine the type of the device attached. if the voltage at dm is +2.3v (typ) or higher and the voltage at dp is +2.3v (typ) or lower, the voltage stays unchanged. if the voltage at dm is forced below the +2.3v (typ) threshold, the internal switch disconnects dm and dp from the resistor-divider and dp and dm are shorted together for dedicated charging mode. if the voltage at dp is forced higher than the +2.3v (typ) threshold, the internal switch disconnects dm and dp from the resistor-divider and dp and dm are shorted together for dedicated charging mode. once the charging voltage is removed, the short between dp and dm is disconnected for normal operation. automatic peripheral reset the max14566e/MAX14566AE feature automatic current- limit switch control output. this feature resets the peripher - al connected to v bus in the event the usb host switches to or from standby mode. cen /cen provide a 1s (typ) pulse on the rising or falling edge of cb (figures 4, 5, and 6). table 1. digital input state (max14566e/MAX14566AE) table 2. digital input state (max14566be) figure 4. max14566e peripheral reset timing diagram x = don't care. attach cen v bus cb 5v am pm pm am usb peripheral standby t vbt usb connection charging current 1000ma 500ma 1000ma 500ma 1000ma cb mode dp/dm comment internal resistor-divider 0 am autodetection circuit active auto mode connected 1 pm connected to tdp/tdm usb traffic active not connected cb cb1 mode status 0 0 am auto mode 0 1 fm forced dedicated-charger mode: dp/dm shorted 1 x pm pass-through (usb) mode: connect dp/dm to tdp/tdm
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 12 figure 5. max14566e peripheral reset applications diagram figure 6. MAX14566AE peripheral reset timing diagram max14566e usb transceiver current-limit switch cls en system control standby cb cen +5v power supply en v cc tdm tdp 0.1f 10ki 150f gnd usb connection d+ dp gnd v cc d- v bus v bus dm attach cen v bus cb 5v am pm pm am usb peripheral standby t vbt usb connection charging current 1000ma 500ma 1000ma 500ma 1000ma
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 13 bus voltage discharge the MAX14566AE automatic current-limit switch control output can be used to discharge the v bus during v bus reset. when the system controls the current-limit switch for v bus toggle, the output capacitor can be discharged slowly depending upon the load. if fast discharge of the v bus capacitor is desired, the cen output can be used to achieve the fast discharge as shown in figure 7. data contact detect all the devices support usb devices that require detect - ing the usb data lines prior to charging. when a usb revision 1.2-compliant device is attached, the usb data lines dp and dm are shorted together. the short remains until it is detected by the usb device. this feature guar - antees appropriate charger detection if a usb revision 1.2-compliant device is attached. the autodetection charger mode is activated after the data contact detect is established. cb must be set low to activate data con - tact detect. esd test conditions esd performance depends on a variety of conditions. contact maxim for a reliability report that documents test setup, test methodology, and test results. extended esd protection (human body model) esd-protection structures are incorporated on all pins to protect against electrostatic discharges up to q 2kv (hbm) encountered during handling and assembly. dp and dm are further protected against esd up to q 15kv (hbm) without damage. the esd structures withstand high esd both in normal operation and when the device is powered down. after an esd event, the device contin - ues to function without latchup (figure 8). figure 7. MAX14566AE v bus discharge circuit MAX14566AE usb transceiver current-limit switch cls en system control standby cb cen +5v power supply en v cc tdm tdp 0.1f 10ki 1ki 150f gnd usb connection d+ dp gnd v cc d- v bus v bus dm
max14566e/MAX14566AE/max14566be usb host charger identification analog switches 14 chip information process: bicmos package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. figure 8a. human body esd test model figure 8b. human body current waveform typical application circuit (max14566be) charge-current- limit resistor discharge resistance storage capacitor c s 100pf r c 1m r d 1.5k high- voltage dc source device under test 100% 36.8% t rl time t dl peak-to-peak ringing (not drawn to scale) i r 0 0 i peak (amps) 90% 10% max14566be usb transceiver current-limit switch am/fm system control pm cb cb1 +5v power supply en v cc tdm tdp tdm tdp 0.1f 150f gnd usb connection d+ dp gnd v cc d- v bus v bus dm en package type package code outline no. land pattern no. 8 tdfn-ep t822+1 21-0168 90-0064
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 15 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. max14566e/MAX14566AE/max14566be usb host charger identification analog switches revision history revision number revision date description pages changed 0 10/10 initial release 1 3/11 changed the usb battery charging specification revision 1.1 to revision 1.2 1, 13

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